New Architecture for Real-Time Image Computing Using Parallel Processing Based on DSP/FPGA

This paper introduces a parallel architecture designed for real-time image processing applications, utilizing a combination of digital signal processor (DSP) and field-programmable gate array (FPGA) components for optimal performance. The FPGA component features a first in, first out (FIFO) interconnection network and a specialized data communication protocol that enables effective interconnectivity between three DSPs (TMS320C6414). The performance metrics of the experimental prototype were impressive, as it exhibited both data, by leveraging its efficient image processing capabilities, the system achieves a harmonious balance in parallel processing.