Repackaging Strategies for Failure Analysis on Printed Circuit Boards

This paper presents a new method for repackaging integrated circuits (ICs) into Small Outline (SO) dimensioned printed circuit boards, to enhance the effectiveness of failure analysis and testing techniques. Compared to ceramic or plastic packaging, printed circuit boards offer a cost advantage, as well as greater design and manufacturing flexibility to meet specific dimensional requirements. The repackaged sample can be used with a commercial burn-in socket without the need for any modifications. This package can be applied for front side and back side analysis. Or with epoxy filled, both front side die and back side die opened can also been modified.