Defect localization on operating condition failure of 3D NAND device level using modified Lock-in thermography

The rapid growth of high-performance power devices, 3D NAND technology, and advanced packaging applications has increased the need for unprecedented failure analysis techniques and defect localization methods to identify the defect mode and root cause. Furthermore, the failure characteristics of 3D NAND or CMOS technology can be triggered by both operating and non-operating conditions. Thermo Fisher Scientific ELITE system with Lock-in IR Thermography (LIT) is a non-destructive failure analysis technique that has been used to localize defects by measuring the temperature difference or thermal emission to generate interpreted hotspot for package and device level analysis. In this study, an RTI MultiTrace tester was applied to supply driving voltages to power pins while simulating the defect hotspot with Thermo Fisher Scientific ELITE system Lock-in IR Thermography (LIT). Additionally, bench tester and fixture were applied for the device-level hotspot analysis. The operating condition LIT method successfully localized three different failure symptoms and modes. Delayering and FIB cut analysis were performed at the hotspot location and detected abnormal voltage contrast, metal burnt, metal-to-metal short, and additional via shorted contact structure vias. In summary, 3D NAND device level failure was successfully isolated and localized from the package level using the operating bias condition in the ELITE system.