Wirebond State-of-Health Measurements Using Specific, Nondestructive Electrical and Thermal Methods

A significant challenge in power electronics lifetime modeling is to implement physics-based models using state-of-health indicators specific to the different interconnection aging mechanisms: solders fatigue, metallization reconstruction, wire heel crack, and liftoff. In this work, the focus is put in the latter mechanism. The ON-state voltage as a state-of-health indicator is considered a package-level health indicator, and it includes the aging effects of both interconnections: metallization and wirebond; thus, it is not convenient to characterize the wirebond state-of-health. In this work, new methods are proposed to measure the equivalent bond radius as a specific wirebond state-of-health indicator. For validation, a simplified configuration is considered where the silicon chip is electrically connected with the terminal using a single wire. An electrical method is proposed, where a local voltage drop measurement is done at a position on the metallization close to the bond of interest to monitor the bond resistance change. Analytical and finite element modeling (FEM) models are developed to give the relationship between the bond resistance increase and the bond radius reduction as the wirebond crack progresses. A thermal imaging method is also proposed, where a temperature increase at the bond is measured, due to the bond aging and its increase in the electrical and thermal resistances. Models are proposed to establish a relationship between the temperature measurements and the bond radius. Both electrical and thermal methods show good agreement with direct measurements using scanning electron microscopy (SEM). In addition, in the studied configuration, it is shown that both the wirebond degradation and the metallization (including the connections between metallization pads) contribute significantly to the Vce increase.