A Power-Efficient LIF Neuron Implementation for Event-Driven Spiking Neural Networks

Spiking Neural Networks (SNNs) have gained attention as a potential power-efficient alternative for neuromorphic applications. This work presents a scalable, configuration-flexible SNN emulation platform and proposes a power-efficient neuron processing unit using dual-rail logic for high-neuron computation; the injection current and membrane potential of the neuron processing unit can be computed within one clock cycle. Compared with traditional single-rail logic circuits, dual-rail logic circuits eliminate the glitches generated during the data propagation, and the power consumption of the processing unit is greatly reduced in high-precision computation. The switching activities decreased by at least 2.6×. When processing 20-bits data, the power consumption of the dual-rail circuits is reduced by 11.76%. When processing 32-bits data, the power consumption of the dual-rail circuits is reduced by 38.54% compared with that of the single-rail circuits.