Addressing Physically Aware Diagnosis Challenges in Hierarchical Core Based Designs

Hierarchical Test (HT) is a partitioned-test method designed to improve performance and decrease resources costs in both DFT and test. Specifically, this methodology eases computing resources and run times required for automatic test pattern generation. It also presents unique challenges and opportunities for diagnosis. Physically aware volume diagnostics greatly improves callout resolution, enabling diagnosis of new fault types, but presents scalability and deployability issues for hierarchical core-based designs. This paper highlights solutions needed to create an efficient high-volume physical diagnosis pipeline for hierarchical core-based designs. Results of the proposed system are demonstrated on 7nm processor designs.