Low Power Implementation of LUT based Cyclic Redundancy Check in Quantum dot Cellular Automata(QCA)

Quantum Cellular Automata (QCA) attracted many people as an alternative to CMOS technology. QCA offered very low power, high speed, and less area when compared to other semiconductor-based transistors. In this paper QCA advantages over CMOS are shown. A QCA layout for CRC- 4 has been made. Another advantage of QCA is usage of Majority gates has a basic gate, which reduces layout size also majority gates can be converted to AND, OR gates as per requirements easily. CRC-4 design is based on majority gates and memory logic. Cycle redundancy Check is a commonly used error detection technique utilized in almost all protocols in transmitting data between devices. CRC-4 is mostly used in switches in networks. Switches should be able to handle high data inflow. Also, CRC-4 is calculated for every data packet received. Thus, high speed technique is required. Thus, a table-based implementation of CRC-4 design is introduced. It processes 8 bits per clock. As the operating speed of QCA is very high, processing CRC-4 design can be an added benefit in terms of power and speed. A brief about QCA has been introduced. QCA based and CMOS based design is evaluated and it was observed that QCA based circuits showed very low power dissipation. An optimal layout for CRC-4 is shown.