Design and Analysis of Approximate Multiplier of Majority-Based Imprecise 4–2 Compressor for Image Processing

Approximate computing is an efficient way to lower energy consumption and design complexity. An approximate 4–2 compressor using majority gates is proposed by adding errors to the truth table of the exact compressor. It achieves a considerable improvement in terms of power-delay-product (PDP) and energy-delay-product (EDP). Then an
$8\times 8$
Dadda multiplier using the proposed inexact compressor is designed and gives great optimization in compressing partial products stage. Compared to the exact and previous multipliers, synthesis and simulation results indicate that the proposed multiplier realizes a 12% reduction in error rate (ER) together with reductions in PDP and EDP by up to 30% and 35%, respectively. Furthermore, image multiplication and image filtering algorithm are implemented to test the practicability of the proposed multiplier in fault-tolerant applications. The evaluation indicators also show that the designed multiplier obtains better-quality images.