A High 5292-PPI Pixel Circuit for Micro Displays With 10-Bit Gray Levels Realized via the Technique of Analog Sub-Frame Integral

A pixel circuit driven in small range of data voltage
$(V_{data})$
is proposed for high pixel-per-inch (PPI) micro displays, using the new driving technique of analog sub-frame integral (A-SFI) to realize the required current integrals of gray levels. This circuit runs with two analog
$V_{data}$
’s configurated by 7-bit digital-to-analog converters (DACs), outputting 10-bit integral currents by receiving a digital voltage of
$V_{sel}$
at each sub-frame that is one of eight (3-bit) equally divided from an illuminating period. With the 1-LSB of 5mV assumed, the estimated
$V_{data}$
range of 0.64V, which is apparently lower than at least 5V of a conventional circuit made by high voltage FETs (HVFETs), assists the proposed circuit in mainly constructing by the low voltage FETs (LVFETs) that are driven by about 1V; therefore, its pixel layout could be shrank for high PPI. Implementing this circuit in a 1.03-inch, high 5292PPI micro OLED panel made via that 55nm CMOS process for the validations, the simulated results over the displaying range show the
${l}$
DNL’s of within +1.15iLSB and −1.01iLSB, the iINL’s of within +1.53iLSB and −1.05iLSB, and the iAD’s of within +1.94% and −1.18%, observed the favorable linearities or deviations to the generated integral currents along 10-bit grayscales. The experimental results show the
${l}$
DNL’s of within
$3.12{l}$
LSB and
$- 1.75{l}$
LSB, and the
${l}$
INL’s of within
$3.35{l}$
LSB and
$- 2.29{l}$
LSB, validated the viability of this technique for high PPI displays.