High-performance n/sup +/-GaAs/p/sup +/-In/sub 0.49/Ga/sub 0.51/P/n-GaAs high-barrier gate heterostructure field-effect transistor

A new heterostructure field-effect transistor (HFET) using an n/sup +/-GaAs/p/sup +/-In/sub 0.49/Ga/sub 0.51/P/n-GaAs high-barrier-gate structure has been fabricated successfully and demonstrated. The heavily doped p/sup +/-In/sub 0.49/Ga/sub 0.51/P layer is introduced to increase the barrier height and to suppress the tunneling current. Therefore, the leakage current is reduced and breakdown voltage is improved substantially. Experimentally, for a 1/spl times/100 /spl mu/m/sup 2/ device, a high gate-drain breakdown voltage of 52 V and high drain-source operation voltage of 20 V with low leakage current are obtained. The high breakdown characteristics of the studied device indicate that devices with n/sup +/-GaAs/p/sup +/-In/sub 0.49/Ga/sub 0.51/P/n-GaAs high-barrier-gate structure are suitable for high-power circuit applications.