Application of Compensation Method for Layout Parasitic Elements Control in Precision DACs

The paper deals with the problem of counteracting parasitic layout elements in precise analog circuits, in particular, precision voltage references and high-bit DACs and ADCs. We described the two main methods of countering them - minimization and compensation ones. On the example of a 14-bit 1 GHz DAC with embedded Bandgap voltage reference, we evaluated the effect of parasitic resistances on the device performance and its static characteristics. We showed that parasitic resistances could increase the TC of the Bandgap voltage reference source by more than 4 times, from 4 ppm/C to 17.3 ppm/C. This impact was assessed as critical for studied 14-bit DAC functioning. With the compensation method of countering the parasitic resistances, we were able to reduce the TC of the reference to 4.8 ppm/C. We concluded that dealing with parasitic elements is mandatory for precision Bandgap voltage references and high-bit DACs, and the compensation method is effective for this task.