A 24-29.5 GHz Compact Receiver Front End with Differential Image Rejection Filter in 65nm CMOS for 5G Application

A 24-29.5 GHz compact receiver front end in 65nm CMOS for 5G millimeter-wave application is presented in this paper. A compact differential image rejection filter structure is used to achieve effective image suppression and good impedance matching between LNA and mixer. The image rejection of the filter is realized by an out-of-band zero point generated by the double ring rectangular resonator. Designed and implemented in 65-nm CMOS technology with 1-V supply, the proposed receiver front end realizes that the conversion gain of 25 dB to 33.4 dB and the image signal suppression of 33.5 dB to 60.5 dB from 24 GHz to 29.5 GHz. The chip size is only 0.49 mm2 excluding all DC PADs.