Study on Inter-Layer Overlay of Stitching Lithography Technology

The interlayer overlay shift during semiconductor process may lead to a series of serious failure problems including short circuit, open circuit, and graphics failure. Furthermore, existing compensatory techniques are incapable of completely controlling the OVL shift induced by the stitching lithography process for large-area devices. In this paper, inline overlay reveal that the displacement of overlay marks on stitching mask significantly affects the process feedback and interlayer alignment. Therefore, a design rule of overlay mark dedicated to stitching reticle, which states the arrangement of overlay marks in the same exposure image, was proposed to improve the alignment for stitching lithography process.