3D Compact Thermal Model and its Application on Fast Chip Level Thermal Simulation

This paper presents a three dimensional fast thermal simulation tool named 3DDCTM for chip level integrated circuits, which is developed based on Compact Thermal Model (CTM) and Model Order Reduction (MOR) algorithm. The tool provides various types of solution including steady conduction, unsteady conduction, and a Smart Compact Thermal Model for Dynamic Thermal Management (DTM). A nonuniform orthogonal grid generation module is integrated into the tool and could automate generate body fit grids based on presetting grid constraints. 3DDCTM requires much less computational time with a similar accuracy compared to traditional thermal simulators. Due to the ability of reading JEDEC the exchange of electronic thermal system level simulation models (ECXML), the present tool supports import model established by commercial simulators, which greatly enhances the extent of the tool. The results could be loaded and shown in the open source visualization application Paraview. The thermal behavior of a chip with high-end packages is investigated for verification. The simulation results are discussed and it is found that the present thermal tool shows an excellent performance not only on good accuracy but also less computational time compared with typical thermal commercial software.