Improved Depth-Aware Circuit Partitioning for Mixed Logic Synthesis

Mixed logic synthesis takes advantage of distinct logic representations through circuit partitioning, classification and optimization, and merging. How circuits are partitioned plays a significant role in the quality of results (QoR) of mixed logic synthesis. Currently, existing methods employ either a naive or a structurally aware approach. However, the critical path may be destructed by circuit merging due to the critical path segment being disconnected by partitions. To address this issue, we propose an improved depth aware circuit partitioning method for mixed logic synthesis. To be specific, we treat the critical path as an entity and set the partition size dynamically according to the logic depth of the input circuit. Based on the EPFL benchmark suites, XOR-Majority Graph (XMG) achieves a 19% reduction in logic depth with a 6% logic node increase over standard mixed-synthesis.