Application of TVS Models for SEED Simulation of a Variety of TVS Devices

Accurate models of transient voltage suppression (TVS) devices are important for determining the suitability of electrostatic discharge (ESD) protection strategies early in the design process. An improved TVS model is used in the following paper to represent a variety of TVS devices, including a snapback device, non-snapback device, and a varistor. The models include recent improvements to represent conductivity modulation and the overall shape of the TVS device’s transient response. The models are tuned based on characterizations of these protection devices using a transmission line pulse (TLP), and are then used in a system efficient ESD design (SEED) simulation to predict the transient voltages and currents in a system consisting of an off-chip TVS, an IC with on-chip ESD protection, and a PCB trace in between. Simulated transient voltage and current waveforms closely match measurements both when testing the TVS devices by themselves and in SEED simulations. Peak and quasistatic currents through the TVS and on-chip diode were typically captured within about 10% or less across the devices tested while varying both the rise time and level of the injected TLP.