A Design of Low-Voltage and Low-Power Analog Front-End for Passive UHF RFID Tag

In order to achieve a longer identifiable distance of the tag, this paper proposed an ultra-low power analog front-end circuit for passive UHF RFID tags with subthreshold and low voltage techniques. The proposed circuit consists of reference circuit, voltage regulator, power-on reset and oscillator. This circuit is implemented in UMC 110nm CMOS technology. The simulation results show that the proposed analog front-end consumes 664nW at a power supply of 1.2V while maintaining high reliability. In addition, the layout area is only $85\mu m\times 60\mu m$, which meets the low-cost requirements of passive tags.