Adaptive Biased Voltage Differencing Buffered Amplifier

Power consumption is an area of utmost importance in the present era. In order to curtail the issue, methods can be developed at the root level, designing power-efficient electronics and its components. A high-performing, power-efficient Adaptive Biased Voltage Differencing Buffered Amplifier (AB-VDBA) is presented in this paper. The proposed structure is designed using three sub-units – Voltage Differencing Unit (VDU), i.e., OTA, Current Subtractor Unit (CSU) and Buffer Amplifier Unit (BAU). A low stand-by current, that results in low power dissipation, can be attained by implementing adaptive biasing in the OTA. The presented VDBA can maintain about the same bandwidth (BW) while offering increased transconductance. The Figure of Merit (FOM) is also calculated to analyze the performance of the proposed circuit. The proposed structure shows 2.65 times increased gain and a 40.7% reduced power dissipation in contrast to the conventional circuit. The results from simulations are found to be in close accord with those obtained from the theoretical analysis. The proposed circuit is simulated using LTSPICE software, with 180 nm CMOS technology.