Study of Fabrication and Reliability for the extremely large 2.5D advanced Package

Today, various heterogeneously integrated package structures have been studying, for example, 2.1D, 2.3D, and 2.5D advanced package. Especially, the 2.5D package using silicon interposer has emerged as a prospective solution providing high routing density interconnects, improving electrical performance, and minimizing the coefficient of thermal expansion (CTE) mismatch. However, as the package size increases, various challenges need to be solved such as warpage control of interposer and package substrate, besides package level reliability. In this study, assuming an actual package, a test vehicle of extremely large 2.5D structure package with
$100\times 100\ \text{mm}^{2}$
package substrate and
$150\times 150\ \text{mm}^{2}$
motherboard was designed and fabricated, and moreover the thermal reliability was evaluated. The dies were bonded on a silicon interposer by thermal-compression bonding (TCB) and the gap between the dies and the interposer was filled with capillary under fill (CUF) followed by compression-molding (C-mold) with granular epoxy molding compounds. Cu/SnAg bumps with
$\phi 75\ \mu\mathrm{m}$
in
$150\ \mu\mathrm{m}$
pitch were formed by a conventional semi-additive process (SAP) on the bottom side of the interposer. The interposer with molded dies was successfully bonded to the package substrate by reflow process and the gap between the interposer and package substrate was filled with CUF. After attaching the stiffener and mounting solder balls, the 2.5D advanced package was bonded to the motherboard and this test vehicle passed the 500-cycle thermal cycle test.