Assembly Challenges and Approaches for 2.5D Chiplet Based System

In recent years, the semiconductor industry has seen a slow down in Moore's law and witnessed longer time spans between process technology nodes. In addition, the integration of transistors on a monolithic chip is becoming more challenging due to available options for device miniaturization [1], [2]. The other issues in chip design and manufacturing are its cost and performance. The application of chip level heterogeneous integration or called the Chiplet technology is a promising solution for this node size limitation. Chiplets are small IC dies with specialized functionality, designed to be combined to make up a larger integrated circuit, following the semiconductor industry's trend of heterogeneous integration [3]. In this paper, 3 different HDFOWLP MCP is designed integrated with chip-to chip interconnections on the RDL-first FOWLP platform. One of the MCP package is using the Intel functional FinFet 22nm chips.