Reliability and Failure Analysis of Chip-to-Substrate Cu-Pillar Interconnections with Nanoporous-Cu Caps

Direct Cu-to-Cu bonding has been of wide interest to the semiconductor industry as it has the potential to replace solder-based Cu-pillar interconnections in high-performance applications and offers a cheaper alternative to Au-to-Au bonding for assembly of analog and power systems. While hybrid bonding has become the technology of choice at foundry level, it is not applicable at the package level due to material and process incompatibilities. In particular, the much higher non-coplanarity and warpage levels expected in chip-to-substrate interconnections cannot be handled through chemical-mechanical planarization (CMP). To address this challenge, our team has pioneered an innovative solution with solder-like compliance in assembly, and bulk-Cu-like properties and reliability in operation through low- temperature, pressure-less sintering of nanoporous-Cu (NP-Cu). This paper demonstrates sintered-NP-Cu-to-Cu assembly using moderate bonding parameters, and die shear strengths comparable to existing thermocompression bonding (TCB) -based direct-Cu bonding. Sintered NP-Cu interconnections demonstrate extensive densification and recrystallization within the bulk of the material, as well as excellent performance under thermal aging tests at 150°C and electromigration stressing at 10
⁵
A/cm2, Thermal cycling testing revealed a novel failure mechanism rooted in the presence of a nanoscale surface film defect, which can be mitigated through broad beam ion milling of the Cu-Zn precursor alloy.