The Advantages of Low temperature (<400°C) Carbon Nano-Tubes (CNTs) as Through Silicon Vias (TSVs) in Multi-Layer Stacking and Backside Power-Via Application

This paper demonstrates the integration of Carbon Nanotubes (CNTs) into several domains of the advanced semiconductor packaging technology. Experiment and implementation of multi-layer stacking at module level with CNTs as Through Silicon Vias (TSVs) is performed and successful electrical connection is reported with electrical resistance
$(\sim 30\Omega)$
between multiple wafers. The metal to CNT contact resistance is reported
$< 10\Omega$
and compared to the thin film catalyst procedure of growing CNT, showing the process of CNT grown in this work is more suitable for application in the future heterogeneous integration. Further the experimental growth of CNT at low temperature
$(\leq 400^{\circ}\mathrm{C})$
is demonstrated with good material quality (I
D
/I
G
ratio ~0.8) and high thermal conductivity
$(\sim 50\mathrm{W}/\text{mK})$
. The experimental growth of high density well-aligned CNTs in the lateral direction is demonstrated which has the potential to replace the present industry standard metals Copper (Cu), Tungsten (W) and Ruthenium (Ru) in the backside power delivery scheme. ANSYS Finite element modeling (FEM) and ANSYS HFSS (High Frequency Structure Simulator) are used to perform thermal (heat dissipation) and electrical (signal and power integrity) benchmarking for backside power-via scheme with different materials showcasing the advantage of CNTs over other materials on the thermal and electrical properties. In summary, the experimental results and simulation results predict that the CNTs are the best suitable candidate for the future semiconductor advanced technology nodes.