Design Considerations for Wideband Hybrid Large-Scale Antenna Array and Implementation of a 5–23-GHz CMOS True-Time-Delay Circuit

This brief presents design considerations for hybrid large-scale antenna arrays steered by both phase shifting and true-time delay (TTD) circuits. A 5–23-GHz TTD circuit with trombone line structure is designed to accommodate such arrays. Techniques of scaled transistors and inductive tuning are applied to achieve small gain variations over the bandwidth. Fabricated in 40-nm bulk CMOS process, the TTD circuit presents 125 ps delay range with 3-bit resolution. The die occupies a total area of $1.6\boldsymbol {\times }0.53$ mm2. The measurement results are employed to operate a 1024-element hybrid array, achieving obvious improvement on pointing precision and power gain, compared to the phased array architecture.