Hardware in the Loop Real-Time Simulation of Improving Hosting Capacity in Photovoltaic Systems Distribution Grid With Passive Filtering Using OPAL-RT

The industrial revolution in the world resulted in a rise in the desire for energy in recent years. Therefore, the trend was strong toward the utilization of alternative and sustainable energy sources, such as solar power and wind energy. However, the growing prevalence of Distributed Energy Resources (DER) systems in the electricity network, cause several issues and operational restriction violations, including high and low voltage levels exaggerative transmission power dissipation, excess power consumption of distribution transformers and supply lines, protection breakdown, and high harmonic thresholds that are above the thresholds set by international standards. Certain issues arise when the power system’s Hosting Capacity (HC) threshold reaches the system’s hosting capability. In low-voltage distribution systems, the hosting capacity of PV systems is impacted by the Total Harmonic Distortion (THD) and Total Demand Distortion (TDD) levels. In this paper, the enhancement of hosting capacity has been achieved for the solar system in the distribution network. The proposed enhancement deals with a lot of considerations such as the capability current of the line and transformer, over and under voltage at the connection point of the distribution system and the PV system, known as the Point of Common Coupling (PCC), the limitation of total harmonic distortion, and line losses by using a new design of harmonic filter (high passive filter). Modeling of a PV system with grid-connected and passive harmonic filter has been validated based on a real-time Hardware in the Loop (HIL) OPAL-RT 4510 Powered by MATLAB SIMULINK. The new high-passive filter design leads to a remarkable 96.12% increase in the maximum hosting capacity (HC) of the system. Moreover, it brings about a reduction of 4.13% in the total harmonic distortion (THD) and 6.32% in the total demand distortion (TDD) of the system. In addition, it enhances the bus voltage by 0.98 pu, improves the power factor to 0.96, and reduces losses by 31.3%. In addition, the proposed technique has been compared to the previous technique.