Synapse Array with Buried Bottom Gate Structure for Neuromorphic Systems

Essential characteristics of synapse arrays in neuromorphic systems include scalability, low-power operation, and precise vector-matrix multiplication (VMM). This paper investigates an asymmetric dual-gate synapse array that offers a power-efficient weight transfer method. By reconfiguring the arrangement of asymmetric gates, a 16
$\mathbf{F}^{2}$
cell-sized synapse array was produced. In addition, the array was fabricated with a buried-bottom gate structure, minimizing cell size and line resistance.