MispredTable: A Side Branch Predictor to TAGE in Multithreading Processors

Tagged geometric history length (TAGE) branch predictor shows good prediction accuracy with sufficient storage budget. However, shrinking TAGE's storage budget dramatically reduces its prediction accuracy. In this paper, we propose MT (Misprediction Table)-TAGE, which adds a side predictor to the TAGE branch predictor. This side branch predictor will record the branches with the highest misprediction rate during the running process of the program and modify the prediction result of the branch when the number of mispredictions is higher than dynamic threshold. We also propose a new algorithm that enables MT-TAGE to be implemented in multithreaded processors. This work is written in SystemVerilog and tested on a RISC-V multithreaded processor. The experimental results show that in a quad-thread processor, the misprediction rates of MT-TAGE under the storage budget of 32kbits and 8kbits are 5.03MPKI (misprediction per kilo-instructions) and 5.54MPKI, respectively, which are 12.5% and 15.5% less than TAGE under the same area.