FinFET 6T-SRAM Compute-in-Memory Targeting Low Power Neural Networks Operations

Modern computing relies on the artificial intelligence (AI) for making independent decisions. AI utilizes neural networks (NN) to handle complex tasks execution such as image recognition, text processing, and language interpretation. However, NNs are extremely data centric and pose performance bottleneck while moving data between memory and processing unit. Compute-in-memory (CIM) addresses this issue but limited attention has been given to the low power neural network operations. This paper proposes a novel CIM solution for multiply and accumulate (MAC) operations without incorporating any dedicated arithmetic units. Proposed CIM makes use of FinFET 6T-SRAM cells, sense amplifiers, write drivers, and NOR gates to achieve the power efficient in-memory computations. Simulations in 12nm FinFET shows that proposed CIM for 2-bit input and 2-bit weights: consumes
$411.2\mu \mathrm{W}$
, exhibits latency of 36.1 ns, and shows maximum power efficiency of 6.51 KOP/W.