A 0.96–0.9-V Fully Integrated FVF LDO With Two-Stage Cross-Coupled Error Amplifier

This brief presents a fully integrated flipped-voltage-follower (FVF) based 0.96–0.9-V low-dropout regulator (LDO) with a high-gain two-stage cross-coupled error amplifier (XCEA). The proposed XCEA overcomes the constraint of intrinsic gain and helps achieve better power supply rejection (PSR) and load regulation. Besides, by setting power supplies of the pass transistor and EA separated and unequal, the efficient dropout increases and different parts of PSR could be measured individually. Fabricated in 28-nm bulk CMOS process, consuming 135-
$\mu \text{A}$
quiescent current and occupying active area of 0.0017 mm2, the LDO features 27-MHz unity-gain bandwidth (UGB) at 20-mA load. The proposed LDO achieves 1.6 ns response time with 160-mV measured voltage undershoot for a 0-to-20-mA load transient current in 100 ps with
$C_{\mathrm{ L}}\,\,=$
200 pF. Owing to the proposed high-gain XCEA, the overall PSR is as good as–38 dB at 10 kHz and–20 dB at 30 MHz.