Solving the Trade-off between Power and Delay in High Speed Circuits using Multi Objective PSO

Power optimization in high speed circuits is a critical need in the current core circuit industry. Among the major components that derive the formula of power, we cannot alter the frequency and the voltage. The controllable factors include Activity Factor (AF) and subsequently the total capacitance of the circuit. This study proposes to deploy physical design experimental techniques to minimize dynamic power. For this, we have integrated fast signal data base (FSDB) and register banking debanking algorithms to minimize the dynamic power. Further, the focus is on solving the tradeoff between power and time delay by employing multi-objective particle optimization algorithm (MOPSO). The experiments are performed on 7 nm technology with the peak frequency ranging between 4.2 GHz to 5 GHz. Synthesis is performed of Cadence Genus on the latest version present. Further, signoff tools Synopsys PrimeTime and PrimePower are utilized to validate the effectiveness of the proposed model.