Speeding up the Solving of Logical Equivalence Checking Problems with Disjunctive Diagrams

In the context of the problem of checking the equivalence of Boolean circuits (LEC), we propose an approach that increases the efficiency of modern SAT solvers on this problem by generating additional constraints of a special kind. To generate such constraints, we use a variant of decision diagrams called disjunctive diagrams. In contrast to well-known Binary Decision Diagrams these diagrams can be constructed effectively for an original formula and can also be used to extend the original CNF formula with new clauses which are its logical consequences. In computational experiments, we show that the resulting formulas, encoding difficult LEC variants, extended by the generated constraints are often significantly easier to solve for state-of-the-art SAT solvers compared to the original formulas.