Stress-Dependent MOSFET Model for Use in Circuit Simulations

This paper presents a stress-dependent MOSFET model based on existing transistor models. The encapsulation of chips is often made from polymers (such as epoxy) which are poured over the silicon chips. When the encapsulation cools, it generates a significant amount of static mechanical stress in the ICs which changes their performance. To compensate for the offsets caused by the stress, chip designers need to be able to simulate the effects of stress on their circuits and design stress sensors and active stress-compensating circuits. In this paper, a stress-dependent MOSFET model is implemented by combining existing transistor models and a Verilog-A cell. In this way, temperature, corner and other transistor variations can be simulated in combination with stress. Simulations show that this model can be used to simulate the stress effects on circuits and to design and optimize stress-compensating circuits.