Implementation of Chaos-Based Image Encryption on FPGA

Information security is becoming more crucial to data transmission and storage in this era of digital communication. In numerous processes, images are frequently used. As a result, protecting the image data from misuse is equally crucial. Image encryption is a solution to protect visual data from hackers. The chaotic image encryption algorithm is a unique choice, but software algorithms can be hacked from anywhere. The paper proposes the encryption scheme along with a standalone device using FPGA. Even if the software is compromised, the FPGA encryption keys are more secure. Because the encryption scheme is developed on core reconfigurable hardware, which can increase the security level and speed since multiple operations can be performed simultaneously as also FPGA, it is generally true that without physical access to a standalone FPGA device, it is difficult for a non-intended user to hack the key stored on the device. FPGAs typically store their configuration information (including the key) in non-volatile memory, such as flash memory, which is not easily accessible to an attacker without physical access to the device. Furthermore, FPGA is more flexible in altering its internal architecture based on the proposed encryption scheme, which adapts to different encryption schemes. Chaos-based image encryption using FPGA can overcome several issues like security, key management, robustness, and scalability. The proposed encryption scheme is validated by performing entropy, correlation, and histogram test analyses.