Low power and high speed level translator using Widlar topology

This study examines two different forms of energy-saving and rapid voltage level changers are designed in this research. This article provides comprehensive information on logic down shifters and logic up shifter. The placement of level shifter plays crucial role, the low to high level shifters requires single supply voltage whereas high to low level shifter requires dual supply voltage. Level shifters have been developed using gpdk 45nm technology. The level changer design described in this paper can transform input voltages from sub-threshold levels to the desired voltage supply. The level shifter can convert high voltage (VVDH) to low voltage (VVDL) and vice versa. The level shifter designed here using Widlar current mirror instead of Wilson current mirror. Due to the development of highly efficient and low power consumption application, it is important to manage a complex circuit with minimal power consumption to achieve, the best method for lowering system-level power usage is multi supply voltage domain. For interconnection of ICs and to avoid static current and to accommodate supply voltage configurations, level translators (LSs) must be used. The designed level shifters are simulated using Cadence tool