Design for a Communication Signal Modulation Pattern Recognition System Based on AP-SoC

This paper designs a communication signal modulation pattern recognition system, which can recognize four modulation patterns. The system is based on All Programmable System on Chip (AP-SoC). By the FPGA of the platform, it adopts parallel pipeline structure and implements the modulation pattern recognition module, which can simultaneously calculate eight data points in parallel. Meanwhile, the system uses the high performance data ports and IP cores to transfer data between the memory of the ARM and the cache of custom module efficiently. Therefore, the system has a good real-time performance. The system designed in this paper takes 0.015789ms to identify 8912 sampling points in standalone mode. Compared with a Matlab program, the speedups reaches 570 times. In the design, when the SNR is greater than a certain value, the system has a stable recognition performance for four modulation styles.