Low Power Multiplier using SPST based on Kogge Stone Adder

Multipliers are important hardware components in most digital and high-speed systems, such as microprocessors, digital signal processors, and FIR filters. In reality, Multipliers, which are complicated units, are responsible for the total speed, size, and power consumption of digital systems. Multiplication in digital systems has a wide range of requirements for speed, size, power consumption, and other parameters. It comprises of partial product production, partial product reduction, and lastly carry-propagate addition. The Multiplier design focuses on minimizing power dissipation while still maintaining other parameters. To obtain considerable power savings in VLSI design, the dynamic power dissipation of multipliers must be reduced. The fundamental goal of this effort is to choose an appropriate adder that consumes less power, runs at a high speed, and is plainly less expensive. The available 8-bit adders, such as the Carry Select Adder, Ripple Carry Adder, Carry Look Ahead Adder, and Kogge Stone Adder, are investigated. Among the adders tested, the Kogge Stone Adder performs the best. This adder may be used to create efficient multipliers.