Single-Back and Double-Front Gate-Controlled IGBT for Achieving Low Turn-Off Loss

Reducing turn-off loss (
$E_{\text{off}\_\text{total}}$
) in insulated-gate bipolar transistors (IGBTs) improves the power consumption of high-power converter systems. Multi-gate IGBTs can reduce
$E_{\text{off}\_\text{total}}$
because stored carriers are reduced by adding independently controllable gates that switch just before the turn-off period. The proposed single-back and double-front gate-controlled IGBT (SDG-IGBT) successfully reduces
$E_{\text{off}\_\text{total}}$
when both the control gate (CG) on the emitter side and the back gate (BG) on the collector side are operated simultaneously. When the drift layer is thick in high-voltage IGBTs (e.g., the 3-kV-class), the control design of SDG-IGBTs is simple because the CG and BG carrier reduction regions do not interfere with each other. The optimum switching timings of CG and BG can be decided by evaluating
$E_{\text{off}\_\text{total}}$
in mode-2 (CG only operation) and mode-3 (BG only operation). SDG-IGBTs have the potential to greatly reduce
$E_{\text{off}\_\text{total}}$
while maximally utilizing the capabilities of both CG and BG because
$E_{\text{off}\_\text{total}}$
reduction rate is represented by the sum of the values for mode-2 and mode-3.