A 40-GHz Load Modulated Balanced Power Amplifier Using Unequal Power Splitter and Phase Compensation Network in 45-nm SOI CMOS

In this work, a ten-way power-combined power amplifier is designed using a load modulated balanced amplifier (LMBA)-based architecture. To provide the required magnitude and phase controls between the main and control-signal paths of the LMBA, an unequal power splitter and a phase compensation network are proposed. As proof of concept, the designed power amplifier is implemented in a 45-nm SOI CMOS process. At 40 GHz, it delivers a 25.1 dBm
$\text{P}_{\text {sat}}$
with a peak power-added efficiency (PAE) of 27.9%. At 6-dB power back-off level, it achieves 1.39 times drain efficiency enhancement over an ideal Class-B power amplifier. Using a 200-MHz single-carrier 64-QAM signal, the designed amplifier delivers an average output power of 16.5 dBm with a PAE of 13.1% at an EVM
_rms
of −23.9 dB and ACPR of −25.3 dBc. The die size, including all testing pads, is only 1.92 mm
²
. To the best of the authors’ knowledge, compared with the other recently published silicon-based LMBAs, this design achieves the highest
$\text{P}_{\text {sat}}$
.