Design of High-Reliability LDO regulator with SCR based ESD Protection circuit using dual buffer structure for low-voltage applications

The magnitude of the peak voltage may affect the system of the LDO regulator depending on the load current. The LDO regulator, which must provide the appropriate voltage for each system level, must be designed to be insensitive towards the changes in the load current. The proposed LDO regulator was applied to have an excellent current driving capability depending on the load current with the dual buffer structure. In addition, the proposed ESD protection provides improved ESD robustness characteristics using PTSCR (P-Substrate Triggered SCR) in low-voltage applications built into the power lines and output terminals based on the silicon control rectifier (SCR). The operating conditions of the proposed LDO regulator of the dual buffer structure were set to an input voltage of 3.3 V to 4.5 V, a maximum load current of300 mA, and an output power voltage of 3 V. As a result of the measurement, the proposed LDO regulator maintained undershoot and overshoot voltages of 41 and 46 mV, respectively, when a load current of 200 mA was applied. In addition, it was confirmed that a stable output voltage was provided after the introduction of the ESD situation.