Defect Classification for Integrated Circuits Contamination on Land Grid Arrays

Land Grid Arrays (LGA) are a surface mount packaging type used for integrated circuits and act as a physical interface for Intel Pentium, Intel Xeon, and Intel Core processors. Current metrology analytics of land contamination defects in LGA packages rely partly on qualitative defect definitions, necessitating the human review of reject candidate images generated by an automated inspection as part of the detection process. These qualitative assessments ultimately narrow to a human classification of the defect as either ‘ pass’ or ‘ ‘reject’, losing the qualitative inputs that drove the initial detection. As a result, characterizing new defect archetypes and baseline trends still requires some level of manual monitoring of qualitative inspection data. Therefore, the benefits of an automated solution are needed as an early signal to address notable yield and quality issues from land staining signatures across product portfolios that may not effectively trigger root cause analysis and defect reduction efforts. Ensembled EfficientNet-v2m classification models trained using an attention layer, Mish activation, and class weights achieved highest top-l accuracy score of 91% across 9 different labelled classes of land contamination defects on a test dataset. The developed models have promising results to classify contamination defects consistently across all defined classes and expected to play a significant role interms of costs and efficiency in production lines.