Implementation of Carry Look Ahead Adder with 2-bit Approximate Adder

A new design for a Carry Look Ahead Adder (CLA) that addresses the issue of area and power consumption by incorporating an Approximate adder that reduces the circuit's complexity has been presented in this research. This approach is especially useful for applications where exact precision is not required. The Approximate adder is a combination of two parts, one that provides precise calculations and another that offers less accurate calculations, with the approximate portion designed in a way that minimizes the circuit's area and power consumption. The proposed design uses a 2-bit Approximate adder in a i-bit CLA, and its effectiveness is evaluated by comparing it with an accurate CLA design in terms of area and power consumption.