TID Effect of MOSFETs in SOI BCD Process and Its Hardening Technique

The total ionizing dose (TID) effect of low operation voltage MOSFET (LV-MOS), medium operation voltage lateral double-diffused metal–oxide–semiconductor field-effect transistor (MOSFET) (MV-LDMOS), and 600-V high operation voltage LDMOS (HV-LDMOS) manufactured by silicon-on-insulator (SOI) bipolar-complementary metal–oxide–semiconductor DMOS (BCD) process is investigated by experiments and 3-D TCAD numerical simulations, and the hardening technique is proposed and discussed. The experiment and simulation results of LV-MOS with three different structures indicate that the TID-induced leakage current is mainly caused by the STI oxide, which forms a leakage current path along the side of the channel region. The leakage current of LV-MOS with a square/ring shape gate (RG-MOS) structure does not increase even though the irradiation dose increases to 300 krad(Si). The RG-MOS structure can eliminate the TID-induced leakage current induced by segregating the channel from the STI region, which is used in MV-LDMOS and 600-V HV-LDMOS. The TID-induced leakage current of radiation-hardened MV-LDMOS does not increase at the irradiation dose of 300 krad(Si). The TID-induced leakage current of radiation-hardened 600-V HV-LDMOS is about four orders of magnitude less than that of standard 600-V HV-LDMOS at the irradiation dose of 50 krad(Si). The specific-on-resistance performance of MV-LDMOS and 600-V HV-LDMOS is improved with the increase of irradiation dose. The radiation-hardened technique used in this article can improve the TID tolerance of MOSFETs in SOI BCD process significantly. The systematic and thorough investigation of TID hardening technique of SOI BCD technology will contribute to the application of power ICs in the space environment.