Capacitance Analysis for Volume Reduction Based on Integrated Buck and Buck-Boost LED Driver

This article presents a design methodology to improve the power density of integrated converters operating at universal input voltage fulfilling the standards of connection to the grid and load. The proposed integrated two-stage converter is composed of the power factor correction (PFC) stage behaving as a current source to the bus, and the power control (PC) stage which provides continuous energy to the LED load. Traditionally, the low-frequency ripple (LFR) filtering process is performed by the bus capacitor placed in the output of the PFC stage, while the PC stage output capacitor works only as a high-frequency (HF) filter. The idea is to explore the lower and fixed operating voltage characteristics of the PC stage to share the LFR filtering with the PFC stage. Thus, a mathematical analysis is carried out, considering the influence of the LED characteristics, bus voltage, and capacitances to predict the LFR in the LED current. A case study, composed of an integrated buck and buck-boost converter to supply a 75 W LED load, is presented. For the traditional design method, the LED driver needs an 820 uF/160 V PFC bus capacitor and a 10 uF/80 V output capacitor to filter the HF components, representing a total capacitors’ volume of 17.9 cm
³
. With the proposed analysis, the optimized driver circuit requires a 220 uF/160 V PFC bus capacitor and a 470 uF/80 V output capacitor, resulting in a total capacitors’ volume of 9.7 cm
³
, providing a volume reduction of approximately 45%.