A unified fault analysis framework for MMC VSC-HVDC scheme

Fault study is an essential part of the system design of a MMC VSC-based HVDC scheme that enables engineers to determine system and equipment ratings that are sufficient for any plausible contingencies. It is also fundamental to the protection system design and its coordination. Due to the complexity of the converter systems, calculating system currents and voltages during a converter fault analytically has proven to be challenging, except for a few of the simplest faults. The fault study, therefore, is often performed empirically and involves large-scale simulations in EMT environments, which not only is time-consuming but provides little insight into the underlying factors influencing the fault characteristics. This paper presents a unified fault analysis framework and demonstrates, through theoretical deductions and EMT simulations, that it can be used for calculating any type of fault at any location of a MMC converter. The framework serves to highlight some of the most fundamental fault characteristics and enable equipment ratings and HVDC protection settings to be better calculated without large-scale EMT studies.