A Review on Emerging Tunnel FET Structures for High-speed and Low-power Circuit Applications

Tunnel FET is found to be a prominent candidate to address the various issues like short channel effects, thermionic limitation, which are dominant in MOSFET. It has grabbed the attention of researchers because of its BTBT tunneling mechanism across the source-channel interface which reduces the short-channel effects and improving the S
AVG
lower than 60mV/Dec. Although TFET mitigates the SCE’s and $\mathrm{SS}_{\mathrm{AVG}}$ but ON-current and ambipolar conduction are the roadblocks that degrades the performance. This paper presents a detailed survey on various structures (techniques) introduced by the researchers to address the performance improvement in Tunnel FET.