Enhanced Deep Convolutional Neural Network for Identifying and Classification of Silicon Wafer Faults in IC Fabrication Industries

This paper presents the detection and classification of various manufacturing defects on wafer maps using an enhanced deep convolutional neural network (DCNN). Wafers are tiny discs of semiconducting material, often silicon, that form the basis of integrated circuits. Die-separated integrated circuits (ICs) are produced on each wafer. Automated inspection machines evaluate the functionality of ICs on wafers. On a wafer map, the regional pattern of the passing and failing dies might identify the specific production faults. Using techniques of deep learning, the defect patterns on wafers may be efficiently classified, making it possible to rapidly identify production defects, hence enabling early manufacturing process correction and minimising loss. Resampling is performed in order to resolve the data imbalance problem prior to the training modality. Further performance analysis is carried out by incorporating various optimizers to train the model. The simulation results depicted that the proposed DCNN outperforms the conventional CNN.