Design methodology for Power-Dense and Cost-effective Series-Stacked Active Power Decoupling Circuit

Buck converter based series stacked active power decoupling (SS-APD) circuit is a preferred choice to increase the power density of single-phase converters. Owing to its distinct design dependencies and associated trade-offs, a comprehensive design methodology is essential to achieve desired performance. This article presents a systematic design methodology for buck converter based SS-APD circuit. It minimises the total energy stored in the passive components of buck-SSAPD circuit to enable compact design. Therefore, this methodology is tailored for using electrolytic capacitors, as their cost and volume is proportional to their energy storage. As design having minimum energy storage simultaneously achieves minimum cost and volume, the proposed methodology is inherently multi-objective. The proposed method-ology is employed to design a buck SS-APD prototype with power density of 404 W/inch
³
(by box volume) for a 2 kW, 230 V, 50 Hz single-phase inverter. The satisfactory performance of the fabricated prototype is supported by experimental studies.