A central office combined ADSL-VDSL line driver solution in .35/spl mu/m CMOS

A central office ADSL-VDSL line driver in a 0.35 /spl mu/m 3.3 V CMOS technology is presented. The chip has a missing tone power ratio (MTPR) over 55 dB driving ADSL signals and can deliver VDSL downstream signals with a bandwidth of 8.6 MHz and an out-of-band PSD of -103 dBm/Hz. The power efficiency is 47% for 100 mW ADSL signals with a crest factor of >5.