A Novel Voltage Based In-Memory Computing Architecture using STT-MRAM

This paper deals with In-Memory Computing (IMC), where computations are performed within the memory. IMC is a memory architecture to overcome the performance gap between processors and memory. In this work, A novel voltage-based sensing mechanism has been used to implement IMC. The architecture has been built using an 8x8 array of Spin Transfer Torque Magneto-resistive RAM (STT-MRAM) cells with voltage-based sense circuits to perform logical operations- NOT, AND, OR, and XOR. Further, an 8-bit Ripple Carry Adder has been built in the architecture to demonstrate the addition operation. The simulations are performed in Cadence Virtuoso 6.1.7-64b, 2018 using 45nm technology transistors. Delay and Energy were determined for each operation and it was observed that NOT operation had least delay and OR operation consumed the least energy.