A CMOS BD-BCI Incorporating Stimulation with Dual-Mode Charge Balancing and Time-Domain Pipelined Recording

Electrocorticography (ECoG)-based bi-directional brain-computer interfaces (BD-BCls) have drawn increasing attention due to: (1) the need for concurrent stimulation and recording to restore human sensorimotor functions [1] and (2) decent spatial resolution and signal fidelity along with clinical practicality. On the stimulation side, such BD-BCls may require > 10mA of biphasic current to elicit artificial sensation and > 20V of voltage compliance to accommodate various bio-impedances [1]. The charge mismatch between the two stimulation phases leads to voltage build-up, causing electrode corrosion and tissue damage. Existing charge balancing (CB) techniques, e.g., charge-pack injection (CP1) [2] and time-based charge balancing (TCB) [1], create CB current in the interpulse time interval, leading to unwanted secondary sensations and excessive stimulation artifacts (SAs). For recording, low input-referred noise (1RN) is necessary to acquire small neural signals (NSs) while a large dynamic range (DR) is required to accommodate large SAs. Existing recording systems employ either SAR [1] or continuous-time deltasigma (CT-$\Delta\Sigma$) [3] ADCs (Fig. 4). The former has limited DR due to the DAC mismatch, and the latter suffers from distortion caused by the large-amplitude sharp SAs within the loop delay. Although in [4], the sampling frequency of the $\Delta\Sigma-$ADC is adaptively varied to accommodate SAs, the required settling time is large. To address the above issues, this work presents an ECoG-based BD-BCI that includes: (1) a high-voltage (HV) stimulation system with dual-mode time-based charge balancing (DTCB) and (2) a high-dynamic-range (HDR) time-domain pipelined neural acquisition (TPNA) system.