Automotive Process Reliability Prediction for 5,7nm using ML

High Reliability is critical for automotive chips. Currently, reliability verification has a long turnaround time (TAT), and is possible only during fab-out (VRAMP – Voltage Ramp to breakdown) or package (HTOL -High Temperature Operating Life) level [1]. This paper proposes a machine-learning (ML) based solution to predict reliability earlier during the middle of wafer processing. The solution includes first performing Fab-data augmentation (FDA) to augment the partially available measured fab data and is followed by building an ML model to identify and rank the critical processes that impact reliability. Finally, the model is used to predict the reliability of wafers to help screen them before proceeding through the rest of the expensive Fab process steps.